Pixel clock output frequencies range from 10mhz to 140mhz with sampling clock jitter of 250ps peak to peak.
像素时钟输出频率范围从10mhz到140mhz的采样250ps的峰峰值抖动。
The frequency synchronization and sampling clock synchronization technique in high definition TV (HDTV) are investigated.
研究了高清晰度数字电视(HDTV)中的频率同步及采样钟同步技术。
Offering direct digital frequency synthesis (DDFS) based on the frequency -phase to achieve the following sampling clock.
提出基于频相的直接数字频率合成技术（DDFS）实现采样的跟随时钟。
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